A Dynamic Random Access Memory (DRAM) is an essential element in many electronic products. To increase component density and improve overall performance of DRAM, continuous efforts are made by industrial manufacturers to reduce the sizes of transistors for the DRAM.
As the transistor size is reduced, a capacitive coupling effect between components or an inter-influence between signals in a single contact and from different active regions may cause a data storage damage. Therefore, a novel memory structure and a manufacturing process thereof are necessary to solve problems mentioned above.